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DDS
- DDS的FPGA实现(VHDL),只可调频,调幅可于外部DA实现。(内附三角波、正弦波、方波的rom调用)-DDS on FPGA (VHDL), only FM, AM can be implemented in an external DA. (With triangular wave, sine wave, square wave rom call)
FPGA_daohang
- 一些FPGA代码,里面有很多值得大家参考的代码,本人整理了一周,弄的-Some FPGA code, there are a lot of code is worth your consideration, I am finishing a week, get
ZX_SOPC0
- 基于FPGA的DDS信号源设计 1.输出信号为正弦波、三角波及脉冲 2.信号幅度可调,范围:1V~5V 3.调幅步长:10mV 4.信号频率为低频:10HZ~1MHZ 5.频率调节步长10HZ~100HZ频段为1HZ,100HZ~1kHZ频段为10HZ,1KHZ~1MHZ频段为100HZ 6.频率调节方式通过键盘输入 7.运用LCD显示信号的类型、幅度、调频步长、调幅步长-DDS source FPGA-based design 1. The output sig
dds
- 这是一个基于FPGA设计的DDS信号发生器设计。能够生成正弦波\ASK\PSK\AM\FM等波形。-This is an FPGA design of DDS signal generator based on. Capable of generating sine \ASK\PSK\AM\FM and other waveforms.
ZHWX
- DDS 产生正弦信号,OOK,AM三种波形。 使用xilinx FPGA VHDL-DDS. Resulting in sinusoidal signal, OOK, AM three waveforms. Using xilinx FPGA VHDL.
udpip
- 赛灵思XILINX FPGA verilog写的UDP/IP协议,可用。-I am prepared to use verilog UDP protocol, the test is available.
c3_am_tx
- 使用CycloneIII FPGA实现纯数字AM发射机,播放WAVE格式的文件,通过FPGA数字调幅,从IO发射出去 -Use CycloneIII FPGA to achieve a digital AM transmitter, play WAVE format file, Digital AM modulation, transmitted by FPGA IO